Role Overview

Responsible for high-quality analog layout design with strong matching and reliability considerations.

Key Responsibilities

• Layout of analog/mixed-signal blocks

• Floorplanning within constraints

• Matching techniques (common centroid, interdigitation)

• Parasitic extraction and optimization

• DRC, LVS, ERC closure

• Work with circuit designers for optimization

Required Skills

• Tools: Cadence Virtuoso Layout, Calibre/PVS

• Strong knowledge of layout techniques and effects

• Experience in advanced nodes (FinFET is a plus)

• Understanding of EM/IR and ESD

Layout Design Engineer (Analog Layout)