Role Overview

Responsible for end-to-end physical implementation from netlist to GDSII.

Key Responsibilities

• Floorplanning, placement, CTS, routing

• Timing closure (setup/hold), ECOs

• Power planning and EM/IR analysis

• Physical verification support (DRC/LVS)

• Low power implementation (UPF/CPF)

• Signoff closure (STA, SI, IR drop)

Required Skills

• Tools: ICC2 / Innovus / Fusion Compiler

• STA tools: PrimeTime

• Strong knowledge of PPA optimization

• Experience in advanced nodes preferred

Physical Design Engineer

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